<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<title>stm32f4_blink_led: ADC_TypeDef Struct Reference</title>

<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="doxygen.css" rel="stylesheet" type="text/css" />



</head>
<body>
<div id="top"><!-- do not remove this div! -->


<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  
  
  <td style="padding-left: 0.5em;">
   <div id="projectname">stm32f4_blink_led
   &#160;<span id="projectnumber">1.2.2-120323</span>
   </div>
   
  </td>
  
  
  
 </tr>
 </tbody>
</table>
</div>

<!-- Generated by Doxygen 1.7.6.1 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
      <li><a href="modules.html"><span>Modules</span></a></li>
      <li class="current"><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="files.html"><span>Files</span></a></li>
    </ul>
  </div>
  <div id="navrow2" class="tabs2">
    <ul class="tablist">
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="functions.html"><span>Data&#160;Fields</span></a></li>
    </ul>
  </div>
</div>
<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle">
<div class="title">ADC_TypeDef Struct Reference<div class="ingroups"><a class="el" href="group___peripheral__registers__structures.html">Peripheral_registers_structures</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<!-- doxytag: class="ADC_TypeDef" -->
<p>Analog to Digital Converter.  
</p>

<p><code>#include &lt;<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#af6aca2bbd40c0fb6df7c3aebe224a360">SR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#ab0ec7102960640751d44e92ddac994f0">CR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#afdfa307571967afb1d97943e982b6586">CR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#af9d6c604e365c7d9d7601bf4ef373498">SMPR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a6ac83fae8377c7b7fcae50fa4211b0e8">SMPR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a427dda1678f254bd98b1f321d7194a3b">JOFR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a11e65074b9f06b48c17cdfa5bea9f125">JOFR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a613f6b76d20c1a513976b920ecd7f4f8">JOFR3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a2fd59854223e38158b4138ee8e913ab3">JOFR4</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a24c3512abcc90ef75cf3e9145e5dbe9b">HTR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a9f8712dfef7125c0bb39db11f2b7416b">LTR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a3302e1bcfdfbbfeb58779d0761fb377c">SQR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#aab440b0ad8631f5666dd32768a89cf60">SQR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a97e40d9928fa25a5628d6442f0aa6c0f">SQR3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a75e0cc079831adcc051df456737d3ae4">JSQR</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a22fa21352be442bd02f9c26a1013d598">JDR1</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#ae9156af81694b7a85923348be45a2167">JDR2</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a3a54028253a75a470fccf841178cba46">JDR3</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a9274ceea3b2c6d5c1903d0a7abad91a1">JDR4</a></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">__IO uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_a_d_c___type_def.html#a3df0d8dfcd1ec958659ffe21eb64fa94">DR</a></td></tr>
</table>
<hr/><h2>Field Documentation</h2>
<a class="anchor" id="ab0ec7102960640751d44e92ddac994f0"></a><!-- doxytag: member="ADC_TypeDef::CR1" ref="ab0ec7102960640751d44e92ddac994f0" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#ab0ec7102960640751d44e92ddac994f0">CR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC control register 1, Address offset: 0x04 </p>

</div>
</div>
<a class="anchor" id="afdfa307571967afb1d97943e982b6586"></a><!-- doxytag: member="ADC_TypeDef::CR2" ref="afdfa307571967afb1d97943e982b6586" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#afdfa307571967afb1d97943e982b6586">CR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC control register 2, Address offset: 0x08 </p>

</div>
</div>
<a class="anchor" id="a3df0d8dfcd1ec958659ffe21eb64fa94"></a><!-- doxytag: member="ADC_TypeDef::DR" ref="a3df0d8dfcd1ec958659ffe21eb64fa94" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a3df0d8dfcd1ec958659ffe21eb64fa94">DR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC regular data register, Address offset: 0x4C </p>

</div>
</div>
<a class="anchor" id="a24c3512abcc90ef75cf3e9145e5dbe9b"></a><!-- doxytag: member="ADC_TypeDef::HTR" ref="a24c3512abcc90ef75cf3e9145e5dbe9b" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a24c3512abcc90ef75cf3e9145e5dbe9b">HTR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC watchdog higher threshold register, Address offset: 0x24 </p>

</div>
</div>
<a class="anchor" id="a22fa21352be442bd02f9c26a1013d598"></a><!-- doxytag: member="ADC_TypeDef::JDR1" ref="a22fa21352be442bd02f9c26a1013d598" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a22fa21352be442bd02f9c26a1013d598">JDR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected data register 1, Address offset: 0x3C </p>

</div>
</div>
<a class="anchor" id="ae9156af81694b7a85923348be45a2167"></a><!-- doxytag: member="ADC_TypeDef::JDR2" ref="ae9156af81694b7a85923348be45a2167" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#ae9156af81694b7a85923348be45a2167">JDR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected data register 2, Address offset: 0x40 </p>

</div>
</div>
<a class="anchor" id="a3a54028253a75a470fccf841178cba46"></a><!-- doxytag: member="ADC_TypeDef::JDR3" ref="a3a54028253a75a470fccf841178cba46" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a3a54028253a75a470fccf841178cba46">JDR3</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected data register 3, Address offset: 0x44 </p>

</div>
</div>
<a class="anchor" id="a9274ceea3b2c6d5c1903d0a7abad91a1"></a><!-- doxytag: member="ADC_TypeDef::JDR4" ref="a9274ceea3b2c6d5c1903d0a7abad91a1" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a9274ceea3b2c6d5c1903d0a7abad91a1">JDR4</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected data register 4, Address offset: 0x48 </p>

</div>
</div>
<a class="anchor" id="a427dda1678f254bd98b1f321d7194a3b"></a><!-- doxytag: member="ADC_TypeDef::JOFR1" ref="a427dda1678f254bd98b1f321d7194a3b" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a427dda1678f254bd98b1f321d7194a3b">JOFR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected channel data offset register 1, Address offset: 0x14 </p>

</div>
</div>
<a class="anchor" id="a11e65074b9f06b48c17cdfa5bea9f125"></a><!-- doxytag: member="ADC_TypeDef::JOFR2" ref="a11e65074b9f06b48c17cdfa5bea9f125" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a11e65074b9f06b48c17cdfa5bea9f125">JOFR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected channel data offset register 2, Address offset: 0x18 </p>

</div>
</div>
<a class="anchor" id="a613f6b76d20c1a513976b920ecd7f4f8"></a><!-- doxytag: member="ADC_TypeDef::JOFR3" ref="a613f6b76d20c1a513976b920ecd7f4f8" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a613f6b76d20c1a513976b920ecd7f4f8">JOFR3</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected channel data offset register 3, Address offset: 0x1C </p>

</div>
</div>
<a class="anchor" id="a2fd59854223e38158b4138ee8e913ab3"></a><!-- doxytag: member="ADC_TypeDef::JOFR4" ref="a2fd59854223e38158b4138ee8e913ab3" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a2fd59854223e38158b4138ee8e913ab3">JOFR4</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected channel data offset register 4, Address offset: 0x20 </p>

</div>
</div>
<a class="anchor" id="a75e0cc079831adcc051df456737d3ae4"></a><!-- doxytag: member="ADC_TypeDef::JSQR" ref="a75e0cc079831adcc051df456737d3ae4" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a75e0cc079831adcc051df456737d3ae4">JSQR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC injected sequence register, Address offset: 0x38 </p>

</div>
</div>
<a class="anchor" id="a9f8712dfef7125c0bb39db11f2b7416b"></a><!-- doxytag: member="ADC_TypeDef::LTR" ref="a9f8712dfef7125c0bb39db11f2b7416b" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a9f8712dfef7125c0bb39db11f2b7416b">LTR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC watchdog lower threshold register, Address offset: 0x28 </p>

</div>
</div>
<a class="anchor" id="af9d6c604e365c7d9d7601bf4ef373498"></a><!-- doxytag: member="ADC_TypeDef::SMPR1" ref="af9d6c604e365c7d9d7601bf4ef373498" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#af9d6c604e365c7d9d7601bf4ef373498">SMPR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC sample time register 1, Address offset: 0x0C </p>

</div>
</div>
<a class="anchor" id="a6ac83fae8377c7b7fcae50fa4211b0e8"></a><!-- doxytag: member="ADC_TypeDef::SMPR2" ref="a6ac83fae8377c7b7fcae50fa4211b0e8" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a6ac83fae8377c7b7fcae50fa4211b0e8">SMPR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC sample time register 2, Address offset: 0x10 </p>

</div>
</div>
<a class="anchor" id="a3302e1bcfdfbbfeb58779d0761fb377c"></a><!-- doxytag: member="ADC_TypeDef::SQR1" ref="a3302e1bcfdfbbfeb58779d0761fb377c" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a3302e1bcfdfbbfeb58779d0761fb377c">SQR1</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC regular sequence register 1, Address offset: 0x2C </p>

</div>
</div>
<a class="anchor" id="aab440b0ad8631f5666dd32768a89cf60"></a><!-- doxytag: member="ADC_TypeDef::SQR2" ref="aab440b0ad8631f5666dd32768a89cf60" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#aab440b0ad8631f5666dd32768a89cf60">SQR2</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC regular sequence register 2, Address offset: 0x30 </p>

</div>
</div>
<a class="anchor" id="a97e40d9928fa25a5628d6442f0aa6c0f"></a><!-- doxytag: member="ADC_TypeDef::SQR3" ref="a97e40d9928fa25a5628d6442f0aa6c0f" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#a97e40d9928fa25a5628d6442f0aa6c0f">SQR3</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC regular sequence register 3, Address offset: 0x34 </p>

</div>
</div>
<a class="anchor" id="af6aca2bbd40c0fb6df7c3aebe224a360"></a><!-- doxytag: member="ADC_TypeDef::SR" ref="af6aca2bbd40c0fb6df7c3aebe224a360" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__IO uint32_t <a class="el" href="struct_a_d_c___type_def.html#af6aca2bbd40c0fb6df7c3aebe224a360">SR</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>ADC status register, Address offset: 0x00 </p>

</div>
</div>
<hr/>The documentation for this struct was generated from the following file:<ul>
<li>D:/123/stm32f4_blink_led-1.2.2-120323/inc/<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a></li>
</ul>
</div><!-- contents -->


<hr class="footer"/><address class="footer"><small>
Generated on Fri Mar 23 2012 00:11:24 for stm32f4_blink_led by &#160;<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/>
</a> 1.7.6.1
</small></address>

</body>
</html>
